VLSI Technology (utu previous year question paper)

utu previous year question paper

sub:- VLSI Technology 

b.tech sem 5th

Uttarakhand Technical University

Q1:- Attempt any four parts:

1. Describe CZ process in detail with neat diagram. What is the pull Rate in CZ technique? How the Pull rate is controlled during the CZ crystal growth process?
2. A silicon ingot with 0.5 * 10^16 boron atoms/cm^3 is to be grown by CZ method. What should be the concentration of boron in the melt to obtain the required doping concentration? The segregation coefficient of the boron is 0.8
3. Describe the effect of orientation on oxidation? Prove that linear growth rate occur for short time oxidation.
4. Calculate the oxidation time required for the thermal oxidation of 100A thickness at 1000 degree C. NOTE: B= 5.2  105A 2/min. and B/A = 111A/min {A = angstrom }
5. Describe two most common methods used for measuring thermal oxide thickness.

Q2:- Attempt four parts:

1. How the impurity concentration and junction depth are independently controlled in an ion-implantation process?
2. What is the "Channeling" in an ion implantation process?
3. State the final impurity distribution equation for two diffusion i.e. pre-deposition followed by drive in diffusion. Give examples of constant source and limited source diffusion.
4. A silicon wafer was doped in 10000c predeposition diffusion with phosphorous to its solid solubility limit. The process time was 20 mins. After the predeposition, the surface of silicon was sealed and an 1100oc drive was done. Find derive in time necessary to obtain junction depth of 4um. Assume surface concentration of 1017 cm^3. What is the surface concentration, after derive-in?
5. What is the difference between pseudo-homo-epitexy and hetro-epitexy?

Q3:- Attempt two parts:

1. What are the requirements of a photo resist? Which photo resist is preferred for better resolution and why?
2. (a) Why is higher degree of anisotropy required in VLSI fabrication?
   (b) Write the chemical reactions involved in dry etching of SiO2 and Si using CF4 plasma.
3. What is X-Ray lithography? Describe advantages and problem areas associated with X-Ray ltihography.

Q4:- Attempt two parts:

1. Illustrate with schematic block diagrams the process sequence of BJT process. Also discuss the function of buried layer in a BJT.
2. (a) What do you understand to remove junction spiking effects.
   (b) why is electromigration, suggest some solutions to get rid of the electromigration problem.
3. What do you mean by MOS memory devices? What are its applications ? Give complete fabrication steps.

Q5:- Attempt two parts:

1. Explain why modelling of yield loss mechanisms is required. Explain general model of yield loss mechanism and also explain accelerated testing in brief.
2. How is packaging evaluated for VLSI design? Discuss the types of packaging design consideration.
3. Explain the reliability in terms of VLSI technology. Explain how is accelerated testing performed?

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